amba - 技术专题
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Code generation tool for control and status registers
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Jul 16, 2026 - Ruby
Network on Chip Implementation written in SytemVerilog
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Aug 27, 2022 - SystemVerilog
Control and status register code generator toolchain
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Jul 14, 2026 - Python
Education kit for teaching introductory Arm-based system-on-chip design on FPGA with lectures and practical labs (educational)
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Oct 7, 2025 - HTML
Education kit for teaching advanced Arm Cortex-A system-on-chip design on FPGA platforms with lectures and hands-on labs (educational)
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Oct 7, 2025 - HTML
Education kit for teaching efficient embedded systems design on Arm Cortex-M platforms with labs and lecture materials (educational)
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Oct 7, 2025 - C
The AHB to APB bridge is an AHB slave and the only APB master which provides an interface between the highspeed AHB and the low-power APB. Read and write transfers on the AHB are converted into equivalent transfers on the APB.
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Oct 7, 2022 - Verilog
Parameterised Asynchronous AHB3-Lite to APB4 Bridge.
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May 10, 2024 - SystemVerilog
Reference book for SoC and FPGA designers integrating Arm Cortex-M processors with AMBA bus architectures (educational)
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Jun 16, 2025
Assertion-Based Formal Verification of an AHB2APB bridge, featuring SystemVerilog assertions, RTL designs, and detailed documentation including a final report and project progression presentation.
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Mar 23, 2024 - SystemVerilog
Verification IP for AMBA APB Protocol
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Nov 7, 2023 - SystemVerilog
APB master and slave developed in RTL.
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Oct 25, 2025 - SystemVerilog
Multi-Technology RAM with AHB3Lite interface
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May 10, 2024 - SystemVerilog